Instrukcja obsล‚ugi Texas Instruments SN74F283N


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๎˜๎˜‚๎˜ƒ๎˜„๎˜…๎˜†๎˜‡๎˜ˆ๎˜‰๎˜Š๎˜๎˜‚๎˜‹๎˜„๎˜…๎˜†๎˜‡๎˜ˆ
๎˜„๎˜Œ๎˜๎˜Ž๎˜๎˜Š๎˜๎˜Ž๎˜‚๎˜๎˜‘๎˜’๎˜Š๎˜…๎˜“๎˜”๎˜”๎˜Š๎˜๎˜•๎˜•๎˜–๎˜‘๎˜
๎˜—๎˜Ž๎˜๎˜˜๎˜Š๎˜…๎˜๎˜๎˜๎˜Š๎˜™๎˜๎˜‘๎˜‘๎˜’
SDFS069A โˆ’ D2932, MARCH 1987 โˆ’ REVISED OCTOBER 1993
Copyright ๏ฃฉ 1993, Texas Instruments Incorporated
2โˆ’1
POST OFFICE BOX 655303 โ€ข DALLAS, TEXAS 75265
POST OFFICE BOX 1443 โ€ข HOUSTON, TEXAS 77251โˆ’1443
โ€ขFull-Carry Look-Ahead Across the
Four Bits
โ€ขSystems Achieve Partial Look-Ahead
Performance With the Economy of Ripple
Carry
โ€ขPackage Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
description
The โ€ฒF283 is a full adder that performs the addition
of two 4-bit binary words. The sum (ฮฃ) outputs are
provided for each bit and the resultant carry (C4)
output is obtained from the fourth bit.
The device features full internal look-ahead
across all four bits generating the carry term C4 in
typically 5.7 ns. This capability provides the
system designer with partial look-ahead
performance at the economy and reduced
package count of a ripple-carry implementation.
The adder logic, including the carry, is
implemented in its true form. End-around carry
can be accomplished without the need for logic or
level inversion.
The โ€ฒF283 can be used with either all-active-high
(positive logic) or all-active-low (negative logic)
operands.
The SN54F283 is characterized for operation over
the full military temperature range of โˆ’55ยฐC to
125ยฐC. The SN74F283 is characterized for
operation from 0ยฐ ยฐC to 70 C.
logic symbolโ€ 
ฮฃ
0
6
B1
0
5
A1
3
A2 14
A3
3
12
A4
2
B2
15
B3
3
11
B4
CI
7
C0
C4
9
CO
ฮฃ1
4
0
1
13
10
3
ฮฃ2
ฮฃ3
ฮฃ4
P
Q
ฮฃ
โ€ This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
SN54F283 . . . J PACKAGE
SN74F283 . . . D OR N PACKAGE
(TOP VIEW)
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
A3
ฮฃ3
NC
A4
B4
A2
ฮฃ1
NC
A1
B1
SN54F283 . . . FK PACKAGE
(TOP VIEW)
B2
ฮฃ
NC
C4
4 B3
C0
GND
NC
NC โˆ’ No internal connection
VCC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
ฮฃ2
B2
A2
ฮฃ1
A1
B1
C0
GND
VCC
B3
A3
ฮฃ3
A4
B4
ฮฃ4
C4
2
ฮฃ
๎˜š๎˜‘๎˜›๎˜•๎˜“๎˜™๎˜๎˜Ž๎˜›๎˜‚ ๎˜•๎˜๎˜๎˜ ๎˜œ๎˜๎˜ž๎˜Ÿ!"#$๎˜œ๎˜Ÿ๎˜ ๎˜œ% &'!!(๎˜$ #% ๎˜Ÿ๎˜ž )'*+๎˜œ&#$๎˜œ๎˜Ÿ๎˜ ,#$(-
๎˜š!๎˜Ÿ,'&$% &๎˜Ÿ๎˜๎˜ž๎˜Ÿ!" $๎˜Ÿ %)(&๎˜œ๎˜ž๎˜œ&#$๎˜œ๎˜Ÿ๎˜% )(! $.( $(!"% ๎˜Ÿ๎˜ž ๎˜(/#% ๎˜Ž๎˜%$!'"(๎˜$%
%$#๎˜,#!, 0#!!#๎˜$1- ๎˜š!๎˜Ÿ,'&$๎˜œ๎˜Ÿ๎˜ )!๎˜Ÿ&(%%๎˜œ๎˜2 ,๎˜Ÿ(% ๎˜๎˜Ÿ$ ๎˜(&(%%#!๎˜œ+1 ๎˜œ๎˜&+',(
$(%$๎˜œ๎˜2 ๎˜Ÿ๎˜ž #++ )#!#"($(!%-
๎˜๎˜‚๎˜ƒ๎˜„๎˜…๎˜†๎˜‡๎˜ˆ๎˜‰๎˜Š๎˜๎˜‚๎˜‹๎˜„๎˜…๎˜†๎˜‡๎˜ˆ
๎˜„๎˜Œ๎˜๎˜Ž๎˜๎˜Š๎˜๎˜Ž๎˜‚๎˜๎˜‘๎˜’๎˜Š๎˜…๎˜“๎˜”๎˜”๎˜Š๎˜๎˜•๎˜•๎˜–๎˜‘๎˜
๎˜—๎˜Ž๎˜๎˜˜๎˜Š๎˜…๎˜๎˜๎˜๎˜Š๎˜™๎˜๎˜‘๎˜‘๎˜’
SDFS069A โˆ’ D2932, MARCH 1987 โˆ’ REVISED OCTOBER 1993
2โˆ’2 POST OFFICE BOX 655303 โ€ข DALLAS, TEXAS 75265
POST OFFICE BOX 1443
โ€ข HOUSTON, TEXAS 77251โˆ’1443
logic diagram (positive logic)
11
12
B4
A4
15
14
B3
A3
2
3
B2
A2
6
5
B1
A1
C0 7
ฮฃ1
ฮฃ2
ฮฃ3
ฮฃ4
C4
9
10
13
1
4
Pin numbers shown are for the D, J, and N packages.
๎˜๎˜‚๎˜ƒ๎˜„๎˜…๎˜†๎˜‡๎˜ˆ๎˜‰๎˜Š๎˜๎˜‚๎˜‹๎˜„๎˜…๎˜†๎˜‡๎˜ˆ
๎˜„๎˜Œ๎˜๎˜Ž๎˜๎˜Š๎˜๎˜Ž๎˜‚๎˜๎˜‘๎˜’๎˜Š๎˜…๎˜“๎˜” ๎˜”๎˜Š๎˜๎˜•๎˜•๎˜–๎˜‘๎˜
๎˜—๎˜Ž๎˜๎˜˜๎˜Š๎˜…๎˜๎˜๎˜๎˜Š๎˜™๎˜๎˜‘๎˜‘๎˜’
SDFS069A โˆ’ D2932, MARCH 1987 โˆ’ REVISED OCTOBER 1993
2โˆ’3
POST OFFICE BOX 655303 โ€ข DALLAS, TEXAS 75265
POST OFFICE BOX 1443 โ€ข HOUSTON, TEXAS 77251โˆ’1443
FUNCTION TABLE
OUTPUTS
INPUTS WHEN C0 = L WHEN C0 = H
INPUTS
WHEN C2 = L WHEN C2 = H
A1 B1 A2 B2 1 2 C2 1 2 C2ฮฃ ฮฃ ฮฃ ฮฃ
A3 B3 A4 B4 3 4 C4 3 4 C4ฮฃ ฮฃ ฮฃ ฮฃ
L L L L L L L H L L
H L L L H L L L H L
L H L L H L L L H L
H H L L L H L H H L
L L H L L H L H H L
H L H L H H L L L H
L H H L H H L L L H
H H H L L L H H L H
L L L H L H L H H L
H L L H H H L L L H
L H L H H H L L L H
H H L H L L H H L H
L L H H L L H H L H
H L H H H L H L H H
L H H H H L H L H H
HHHHLHHHHH
NOTE: Input conditions at A1, B1, A2, B2, and C0 are used to determine outputs ฮฃ1
and ฮฃ2 and the value of the internal carry C2. The values at C2, A3, B3, A4,
and B4 are then used to determine outputs ฮฃ ฮฃ3, 4, and C4.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted) โ€ 
Supply voltage range, VCC โˆ’0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range (see Note 1) โˆ’1.2 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current range โˆ’30 mA to 5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state โˆ’0.5 V to VCC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the low state 40 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range: SN54F283 โˆ’55ยฐ ยฐC to 125 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74F283 0ยฐ ยฐC to 70 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range โˆ’65ยฐ ยฐC to 150 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
โ€ Stresses beyond those listed under โ€œabsolute maximum ratingsโ€ may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under โ€œrecommended operating conditionsโ€ is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.


Specyfikacje produktu

Marka: Texas Instruments
Kategoria: Niesklasyfikowane
Model: SN74F283N

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