Instrukcja obsล‚ugi Texas Instruments SN74CBT16211ADLR

Texas Instruments Niesklasyfikowane SN74CBT16211ADLR

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๎˜๎˜‚๎˜ƒ๎˜„๎˜…๎˜†๎˜‡๎˜ˆ๎˜‰๎˜Š๎˜ˆ๎˜ˆ๎˜‹
๎˜Š๎˜„๎˜Œ๎˜†๎˜๎˜‡ ๎˜Ž๎˜๎˜‡ ๎˜†๎˜๎˜ ๎˜๎˜‘๎˜๎˜‡๎˜…๎˜’
SCDS028M โˆ’ JULY 1995 โˆ’ REVISED SEPTEMBER 2003
1
POST OFFICE BOX 655303 โ€ข DALLAS, TEXAS 75265
DMember of the Texas Instruments
Widebus Family๏ฃช
D5-โ„ฆ Switch Connection Between Two Ports
DTTL-Compatible Input Levels
description/ordering information
The SN74CBT16211A provides 24 bits of
high-speed TTL-compatible bus switching. The
low on-state resistance of the switch allows
connections to be made with minimal propagation
delay.
The device operates as a dual 12-bit bus switch or
single 24-bit bus switch. When 1OE is low, 1A is
connected to 1B. When 2OE is low, 2A is
connected to 2B.
ORDERING INFORMATION
TAPACKAGEโ€ ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SSOP DL
Tube SN74CBT16211ADL
CBT16211A
SSOP โˆ’ DL Tape and reel SN74CBT16211ADLR CBT16211A
40ยฐ ยฐC t 85 C
TSSOP โˆ’ DGG Tape and reel SN74CBT16211ADGGR CBT16211A
โˆ’40ยฐ ยฐC to 85 C TVSOP โˆ’ DGV Tape and reel SN74CBT16211ADGVR CY211A
VFBGA โˆ’ GQL
Tape and reel
SN74CBT16211AGQLR
CY211A
VFBGA โˆ’ ZQL (Pb-free)
Tape and reel
SN74CBT16211AZQLR
CY211A
โ€ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Copyright ๏ฃฉ 2003, Texas Instruments Incorporated
๎˜“๎˜”๎˜•๎˜–๎˜๎˜…๎˜‡๎˜๎˜•๎˜‚ ๎˜–๎˜‹๎˜‡๎˜‹ ๎˜—๎˜˜๎˜™๎˜š๎˜›๎˜œ๎˜๎˜ž๎˜—๎˜š๎˜˜ ๎˜—๎˜Ÿ !"๎˜›๎˜›#๎˜˜๎˜ž ๎˜๎˜Ÿ ๎˜š๎˜™ $"%&๎˜—!๎˜๎˜ž๎˜—๎˜š๎˜˜ '๎˜๎˜ž#(
๎˜“๎˜›๎˜š'"!๎˜ž๎˜Ÿ !๎˜š๎˜˜๎˜™๎˜š๎˜›๎˜œ ๎˜ž๎˜š ๎˜Ÿ$#!๎˜—๎˜™๎˜—!๎˜๎˜ž๎˜—๎˜š๎˜˜๎˜Ÿ $#๎˜› ๎˜ž)# ๎˜ž#๎˜›๎˜œ๎˜Ÿ ๎˜š๎˜™ ๎˜‡#*๎˜๎˜Ÿ ๎˜๎˜˜๎˜Ÿ๎˜ž๎˜›"๎˜œ#๎˜˜๎˜ž๎˜Ÿ
๎˜Ÿ๎˜ž๎˜๎˜˜'๎˜๎˜›' +๎˜๎˜›๎˜›๎˜๎˜˜๎˜ž,( ๎˜“๎˜›๎˜š'"!๎˜ž๎˜—๎˜š๎˜˜ $๎˜›๎˜š!#๎˜Ÿ๎˜Ÿ๎˜—๎˜˜- '๎˜š#๎˜Ÿ ๎˜˜๎˜š๎˜ž ๎˜˜#!#๎˜Ÿ๎˜Ÿ๎˜๎˜›๎˜—&, ๎˜—๎˜˜!&"'#
๎˜ž#๎˜Ÿ๎˜ž๎˜—๎˜˜- ๎˜š๎˜™ ๎˜&& $๎˜๎˜›๎˜๎˜œ#๎˜ž#๎˜›๎˜Ÿ(
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
NC
1A1
1A2
1A3
1A4
1A5
1A6
GND
1A7
1A8
1A9
1A10
1A11
1A12
2A1
2A2
VCC
2A3
GND
2A4
2A5
2A6
2A7
2A8
2A9
2A10
2A11
2A12
1OE
2OE
1B1
1B2
1B3
1B4
1B5
GND
1B6
1B7
1B8
1B9
1B10
1B11
1B12
2B1
2B2
2B3
GND
2B4
2B5
2B6
2B7
2B8
2B9
2B10
2B11
2B12
NC โˆ’ No internal connection
Widebus is a trademark of Texas Instruments.
๎˜๎˜‚๎˜ƒ๎˜„๎˜…๎˜†๎˜‡๎˜ˆ๎˜‰๎˜Š๎˜ˆ๎˜ˆ๎˜‹
๎˜Š๎˜„๎˜Œ๎˜†๎˜๎˜‡ ๎˜Ž๎˜๎˜‡ ๎˜†๎˜๎˜ ๎˜๎˜‘๎˜๎˜‡๎˜…๎˜’
SCDS028M โˆ’ JULY 1995 โˆ’ REVISED SEPTEMBER 2003
2POST OFFICE BOX 655303 โ€ข DALLAS, TEXAS 75265
terminal assignments
1 2 3 4 5 6
A1A2 1A1 NC 1OE 2OE 1B1
B1A5 1A4 1A3 1B2 1B3 1B4
C1A7 GND 1A6 1B5 GND 1B6
D1A10 1A8 1A9 1B8 1B7 1B9
E1A12 1A11 1B10 1B11
F2A1 2A2 2B1 1B12
GVCC GND 2A3 2B3 GND 2B2
H2A4 2A5 2A6 2B6 2B5 2B4
J2A7 2A8 2A9 2B9 2B8 2B7
K2A10 2A11 2A12 2B12 2B11 2B10
NC โˆ’ No internal connection
FUNCTION TABLE
(each 12-bit bus switch)
INPUTS INPUTS/OUTPUTS
1OE 2OE 1A, 1B 2A, 2B
L L 1A = 1B 2A = 2B
L ZH 1A = 1B
H L Z 2A = 2B
H H Z Z
logic diagram (positive logic)
2A1
2A12
1OE
1B1
1B12
2
14
56
54
42
2B1
2B12
15
28
55
41
29
1A1
1A12
2OE
Pin numbers shown are for the DGG, DGV, and DL packages.
GQL OR ZQL PACKAGE
(TOP VIEW)
A
B
C
D
E
F
G
H
J
K
1 2 3 4 5 6
๎˜๎˜‚๎˜ƒ๎˜„๎˜…๎˜†๎˜‡๎˜ˆ๎˜‰๎˜Š๎˜ˆ๎˜ˆ๎˜‹
๎˜Š๎˜„๎˜Œ๎˜†๎˜๎˜‡ ๎˜Ž๎˜๎˜‡ ๎˜†๎˜๎˜ ๎˜๎˜‘๎˜๎˜‡๎˜…๎˜’
SCDS028M โˆ’ JULY 1995 โˆ’ REVISED SEPTEMBER 2003
3
POST OFFICE BOX 655303 โ€ข DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted) โ€ 
Supply voltage range, VCC โˆ’0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) โˆ’0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous channel current 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) โˆ’50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, ฮธJA (see Note 2): DGG package 64ยฐC/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 48ยฐC/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL package 56ยฐC/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
GQL/ZQL package 42ยฐC/W. . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg โˆ’65ยฐ ยฐC to 150 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
โ€ Stresses beyond those listed under โ€œabsolute maximum ratingsโ€ may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under โ€œrecommended operating conditionsโ€ is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN MAX UNIT
VCC Supply voltage 4 5.5 V
VIH High-level control input voltage 2 V
VIL Low-level control input voltage 0.8 V
TAOperating free-air temperature โˆ’40 85 Cยฐ
NOTE 3: All unused control inputs of the device must be held at V
CC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER MIN TYPTEST CONDITIONS โ€กMAX UNIT
VIK VCC = 4.5 V, II = โˆ’18 mA โˆ’1.2 V
I
VCC = 0 V, VI = 5.5 V 10
A
IIVCC = 5.5 V, VI = 5.5 V or GND ยฑ1ยตA
ICC VCC = 5.5 V, IO
= 0, V I = VCC or GND 3 Aยต
โˆ†ICCยงControl inputs VCC = 5.5 V, One input at 3.4 V, Other inputs at V
CC or GND 2.5 mA
CiControl inputs VI = 3 V or 0 3 pF
Cio(off) VO = 3 V or 0, OE = VCC 5.5 pF
VCC = 4 V,
TYP at VCC = 4 V VI = 2.4 V, II = 15 mA 14 20
ron
ยถ
V 0
II = 64 mA 5 7 โ„ฆ
ron
V
= 4.5 V
V
I
= 0
II = 30 mA 5 7
โ„ฆ
VI = 2.4 V, II = 15 mA 8 12
โ€กAll typical values are at V
CC = 5 V (unless otherwise noted), T
A = 25ยฐC.
ยงThis is the increase in supply current for each input that is at the specified TTL voltage level, rather than V
CC or GND.
ยถMeasured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by
the lowest voltage of the two (A or B) terminals.

Specyfikacje produktu

Marka: Texas Instruments
Kategoria: Niesklasyfikowane
Model: SN74CBT16211ADLR

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