Instrukcja obsługi Microchip SY89467U

Microchip Niesklasyfikowane SY89467U

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SY89467U
Precision LVPECL 1:20 Fanout with 2:1 MUX
and Internal Termination with Fail-Safe Input
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
April 2008 M9999-040808-C
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY89467U is a 2.5/3.3V, 1:20 LVPECL fanout
buffer with a 2:1 differential input multiplexer (MUX).
A unique Fail-Safe Input (FSI) protection prevents
metastable output conditions when the selected
input clock fails to a DC voltage (when voltage
between the pins of the dierential input drops
signicantly below 100mV).
The differential input includes Micrel’s unique, 3-pin
internal termination architecture that can interface to
any differential signal (AC- or DC-coupled) as small
as 100mV (200mVPP) without any level shifting or
termination resistor networks in the signal path. The
outputs are 800mV, LVPECL with fast rise/fall times
guaranteed to be less than 270ps.
The SY89467U operates from a 2.5V ±5% or 3.3V
±10% supply and is guaranteed over the full
industrial temperature range of –40°C to +85°C. The
SY89467U is part of Micrel’s high-speed, Precision
Edge® product line.
All support documentation can be found on Micrel’s
web site at: www.micrel.com.
Functional Block Diagram
Precision Edge®
Features
•Selects between two inputs, and provides 20
precision LVPECL copies
•Fail-Safe Input
– Prevents outputs from oscillating when input is
invalid
•Guaranteed AC performance over temperature and
supply voltage:
– DC-to >1.5 GHz throughput
– < 1200ps Propagation Delay (In-to-Q)
– 270ps Rise/Fall times
•Ultra-low jitter design:
– <1psRMS random jitter
– <1psRMS cycle-to-cycle jitter
– <10psPP total jitter (clock)
– <0.7psRMS MUX crosstalk induced jitter
•Unique, patented MUX input isolation design
minimizes adjacent channel crosstalk
•Unique patented internal termination and VT pin
accepts DC- and AC-coupled inputs (CML, PECL,
LVDS)
•Wide input voltage range: VCC to GND
•2.5V ±5% or 3.3V ±10% supply voltage
•-40°C to +85°C industrial temperature range
•Available in 64-pin TQFP package
Applications
•Fail-safe clock protection
•SONET clock distribution
•Backplane distribution
Markets
•LAN/WAN
•Enterprise servers
•ATE
•Test and measurement
Precision Edge is a registered trademark of Micrel, Inc.
MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc.
Micrel, Inc. SY89467U
April 2008 M9999-040808-C
hbwhelp@micrel.com or (408) 955-1690
2
Ordering Information(1)
Part Number Package
Type
Operating
Range
Package Marking Lead
Finish
SY89467UHY T64-1 Industrial SY89467UHY with
Pb-Free bar-line Indicator
Matte-Sn
Pb-Free
SY89467UHYTR(2) T64-1 Industrial SY89467UHY with
Pb-Free bar-line Indicator
Matte-Sn
Pb-Free
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A = 25°C, DC Electricals Only.
2. Tape and Reel.
Pin Configuration
64-Pin EPAD-TQFP (T64-1)
Micrel, Inc. SY89467U
April 2008 M9999-040808-C
hbwhelp@micrel.com or (408) 955-1690
3
Pin Description
Pin Number Pin Name Pin Function
1, 16, 23, 33
41, 48, 58 VCC Positive Power Supply: Bypass with 0.1µF||0.01µF low ESR capacitors as close to the V
CC
pins as possible.
64, 63
62, 61
60, 59
57, 56
55, 54
53, 52
51, 50
47, 46
45, 44
43, 42
39, 38
37, 36
35, 34
31, 30
29, 28
27, 26
25, 24
22, 21
20, 19
18, 17
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
Q4, /Q4
Q5, /Q5
Q6, /Q6
Q7, /Q7
Q8, /Q8
Q9, /Q9
Q10, /Q10
Q11, /Q11
Q12, /Q12
Q13, /Q13
Q14, /Q14
Q15, /Q15
Q16, /Q16
Q17, /Q17
Q18, /Q18
Q19, /Q19
LVPECL Differential Output Pairs: Differential buffered output copies of the selected input
signal. The output swing is typically 800mV. Unused output pairs may be left floating with no
impact on jitter. See “LVPECL Output Termination” subsection. Normally terminated with 50Ω
to VCC-2V. These differential LVPECL outputs are a logic function of the IN0, IN1, and SEL
inputs. See “Truth Table” below.
4, 13 VREF-AC0
VREF-AC1
Reference Voltage: These outputs bias to V
CC–1.2V. They are used for AC-coupling inputs IN
and /IN. Connect VREF-AC directly to the corresponding VT pin. Bypass with 0.01µF low
ESR capacitor to VCC. Due to limited drive capability, each VREF-AC pin is only intended to
drive its respective VT pin. Maximum sink/source current is ±0.5mA. See “Input Interface
Applications” subsection.
5, 12 VT0, VT1
Input Termination Center-Tap: Each side of a differential input pair terminates to the VT pin.
The VT pin provides a center-tap for each input (IN, /IN) to a termination network for
maximum interface flexibility. See “Input Interface Applications” subsection.
6, 7
10, 11
IN0, /IN0
IN1, /IN1
Differential Inputs: These input pairs are the differential signal inputs to the device. These
inputs accept AC- or DC-coupled signals as small as 100mV. The input pairs internally
terminate to a VT pin through 50Ω. This allows a wide input voltage range from VCC to
GND. See Figure 3a, Simplified Differential Input Stage for details. Note that when these
inputs are left in an open state, the FSI feature will override this input state and provide a
valid state at the output. See “Functional Description” subsection.
2, 3, 14, 15,
32, 40, 49
GND,
Exposed
Pad
Ground. Exposed pad must be connected to a ground plane that is the same potential as the
ground pins.
9 OE
Single-Ended Input: This TTL/CMOS input disables and enables the Q0-Q19 outputs. It is
internally connected to a 25kΩ pull-up resistor and will default to a logic HIGH state if left
open. When disabled, Q goes LOW and /Q goes HIGH. OE being synchronous, outputs will
be enabled/disabled following a rising and a falling edge of the input clock. V
TH = VCC/2.
8 SEL
Single-Ended Input: This single-ended TTL/CMOS-compatible input selects the inputs to the
multiplexer. Note that this input is internally connected to a 25kΩ pull-up resistor and will
default to logic HIGH state if left open. V
TH = VCC/2.
Truth Table
Inputs Outputs
IN0 /IN0 IN1 /IN1 SEL Q /Q
0 1 X X 0 0 1
1 0 X X 0 1 0
X X 0 1 1 0 1
X X 1 0 1 1 0

Specyfikacje produktu

Marka: Microchip
Kategoria: Niesklasyfikowane
Model: SY89467U

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