Instrukcja obsługi Microchip SY88149CL

Microchip nieskategoryzowany SY88149CL

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SY88149CL Evaluation Board
3.3V, 1.25Gbps PECL Limiting Post
Amplifier with High-Sensitivity TTL SD
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
December 2005
M9999-121305-
A
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY88149CL evaluation board enables fast and
thorough evaluation of the SY88149CL. The board is
an easy-to-use, single supply design, designed to be
driven by a high-speed, pattern generator. The input
termination network also provides the required input
bias of V
CC
-1.3V for the SY88149CL.
The SY88149CL evaluation board is intended to
terminate to a 50 scope and provides for simple
user adjustability of the SD threshold through the
adjustment of an on-board potentiometer.
All data sheets and support documentation can be
found on Micrel’s web site at: www.micrel.com.
Features
• SY88149CL PECL Limiting Post Amplifier with High-
Sensitivity TTL SD
• Single +3.3V power supply
• AC-coupled configuration for direct interface with 50
test equipment
• On-board SD sensitivity adjustment
Related Documentation
3.3V, 1.25Gbps PECL Limiting Post Amplifier with High-
SensitivityTTL
___________________________________________________________________________________
Evaluation Board
Micrel, Inc
SY88149CL Evaluation Board
December 2005
M9999-121305-A
hbwhelp@micrel.com or (408) 955-1690
2
Evaluation Board Description
The SY88149CL evaluation board is designed to
operate with a single 3.3V ±10% power supply and is
configured with AC-coupled inputs and outputs. The
high-speed input and output channels are brought out
to SMA connectors through matched length AC-coupled
differential strip-line traces.
AC-Coupled Input
The AC-Coupled inputs automatically bias the input
levels to the correct DC-operating point set by the VT
jumper input. Therefore, the inputs can be driven by a
differential signal smaller than 100mV (200mV
pp
)
without level shifting or termination resistor network in
the signal path.
AC-Coupled Output
The SY88149CL is configured with AC-coupled outputs
allowing the board to interface directly with 50Ω
equipment. AC-coupling allows the board to use a
single power supply. If only one output is being used,
the unused complimentary output should be terminated
into 50Ω to ground.
SY88149CL AC-Coupled Evaluation Board Setup
This section explains how to connect and setup the
SY88149CL evaluation board per Figure 1. Ensure
proper ESD precautionary measures are taken before
handling sensitive electronic equipment, including the
SY88149CL evaluation board.
Measurements
Evaluating DOUT & /DOUT
1. Set a DC power supply to +3.3V and turn it off.
Connect the positive lead to V
CC
post and the
negative lead to GND post.
2. Set the desired frequency on a pattern generator
with an amplitude between 5mV
PP
and 1800mV
PP
.
Typical data patterns are 2
7
-1 or 2
23
-1 PRBS
patterns depending on the application. Since the
inputs to the board are AC-Coupled, the voltage
offset of the pattern generator is not significant so it
can be set between GND and VCC.
3. Connect the pattern generator with differential
outputs as a data source to the DIN and /DIN inputs
on the SY88149CL evaluation board. Use matched
length differential cables.
4. Turn the power supply on.
5. Observe the DOUT and /DOUT outputs with a 50Ω
scope. The output rise and fall times should be less
than 260ps, with an amplitude around 800mV
(1600mV
p-p
differential).
SD Hysteresis Measurements
The SY88149CL evaluation board provides a
potentiometer to allow for convenient adjustment of
SD
LVL
without the need for an extra power supply. SD
LVL
taps off a potentiometer connected between V
CC
and
V
REF
. V
REF
is a reference voltage of approximately V
CC
-
1.3V. Hence, SDLVL can be set to any voltage between
V
CC
and V
CC
-1.3, as specified in the SY88149CL data
sheet. The potentiometer creates a voltage divider.
Thus,
( )
( )( )
⎥
⎦
⎤
⎢
⎣
⎡
+
×
−= 2.8kΩkΩR
kΩR1.3
VSD
CCLVL
Where R is the resistance of the potentiometer from V
CC
to the tap at SDLVL. The steps below show how to
measure the SD hysteresis as a function of the input
voltage swing at the DIN and /DIN inputs:
Minimum input swing hysteresis measurement
The minimum acceptable input swing for the
SY88149CL is 5mV
PP
.
1. Set a DC power supply to +3.3V and turn it off.
Connect the positive lead to V
CC
post and the
negative lead to GND post.
2. Connect a DMM or similar voltage measurement
device between the SD
LVL
pin and V
CC
.
3. Connect a second DMM or similar voltage
measurement device between the SD output and
GND. For the remainder of this document this DMM
will be referred to as the SD DMM.
4. Connect the pattern generator with differential
outputs as a data source to the DIN and /DIN inputs
on the SY88149CL evaluation board. Use matched
length differential cables.
5. Turn the power supply on.
6. Adjust the trimpot VAR1 so the voltage at the SD
LVL
pin is around 1.3V below V
CC
. This sets the SD for
maximum sensitivity. At this level the SD output
should go HIGH or LOW (measured with the SD
DMM set up in step 4) as the input voltage swing at
DIN and /DIN is varied around 5mV
PP
.
7. Now adjust the trimpot is to vary the voltage so it is
closer to V
CC
. Note that as the voltage at the SD
LVL
pin approaches V
CC
a larger input voltage swing is
required to trigger the assert and deassert levels,
while as the SD
LVL
voltage moves away from V
CC
the assert and deassert levels are triggered by
input voltage swings as small as 5mV
PP
.
8. The hysteresis between the assert and deassert
levels can be calculated with the following equation:
Hysteresis(dB) =20log(SD Assert voltage/SD de-
assert voltage). This hysteresis should be >2dB.
Micrel, Inc
SY88149CL Evaluation Board
December 2005
M9999-121305-A
hbwhelp@micrel.com or (408) 955-1690
3
Evaluation Board Layout
The evaluation boards are constructed with Rogers
4003 material and are coplanar in design fabricated to
minimize noise, achieve high bandwidth and minimize
crosstalk.
L1 GND and Signal
L2 GND
L3 VCC
L4 GND
Table 1. Layer Stack
J1
J2 C2
0.1µF
C1
0.1µF
C3
0.1µF
C4
0.1µF
C6
0.1µF
V
CC
V
CC
VAR1
Trimpot
R2R1
J3
J4
C41
10µF
C42
1µF
Header Pins J1
L1
R4R3
3
4
5
2
EN
EN
SD
DIN
/DIN
VREF
SDLVL GND
SD
1
1
2
3
VCC
10
DOUT
9
/DOUT
8
7
6
SY88149CL
V
CC
GND
Figure 1. Setup for Measurement

Specyfikacje produktu

Marka: Microchip
Kategoria: nieskategoryzowany
Model: SY88149CL

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