Instrukcja obsługi Microchip PIC32MX675F512H

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© 2009-2017 Microchip Technology Inc. DS60001155D-page 35-1
Section 35. Ethernet Controller
This section of the manual contains the following major topics:
35.1 Introduction.............................................................................................................. 35-2
35.2 Ethernet Controller Overview .................................................................................. 35-3
35.3 Status and Control Registers................................................................................... 35-4
35.4 Operation...............................................................................................................35-43
35.5 Ethernet Interrupts................................................................................................. 35-82
35.6 Operation in Power-Saving and Debug Modes ..................................................... 35-87
35.7 Effects of Various Resets....................................................................................... 35-90
35.8 I/O Pin Control ....................................................................................................... 35-91
35.9 Related Application Notes ..................................................................................... 35-92
35.10 Revision History..................................................................................................... 35-93
PIC32 Family Reference Manual
DS60001155D-page 35-8 © 2009-2017 Microchip Technology Inc.
Register 35-1: ETHCON1: Ethernet Controller Control 1 Register
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PTV<15:8>
23:16
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PTV<7:0>
15:8
R/W-0 U-0 R/W-0 U-0 U-0 U-0 R/W-0 R/W-0
ON — SIDL — — — TXRTS RXEN
(1)
7:0
R/W-0 U-0 U-0 R/W-0 U-0 U-0 U-0 R/W-0
AUTOFC — — MANFC — — — BUFCDEC
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-16 PTV<15:0>: PAUSE Timer Value bits
This register should be written only when the RXEN bit (ETHCON1<8>) is not set. These bits are only used
for Flow Control operations.
bit 15 ON: Ethernet ON bit
1 = Ethernet module is enabled
0 = Ethernet module is disabled
bit 14 Read as ‘Unimplemented: 0’
bit 13 SIDL: Ethernet Stop in Idle Mode bit
1 = Ethernet module transfers are suspended during Idle mode
0 = Ethernet module transfers continue during Idle mode
bit 12-10 Read as ‘Unimplemented: 0’
bit 9 TXRTS: Transmit Request to Send bit
1 = Activate the transmit logic and send the packets defined in the TX Ethernet Descriptor Table (EDT)
0 = Stop transmit (when cleared by software) or transmit done (when cleared by hardware)
After the bit is written with a ‘1 0’, it will clear to ‘ ’ whenever the transmit logic has finished transmitting the
requested packets in the EDT. If ‘0’ is written by the CPU, the transmit logic finishes the current packet’s
transmission, and then stops any further transmission.
This bit only affects TX operations.
bit 8 RXEN: Receive Enable bit
(1)
1 = Enable RX logic, packets are received and stored in the RX buffer as controlled by the filter configuration
0 = Disable RX logic, no packets are received in the RX buffer
This bit only affects RX operations.
bit 7 AUTOFC: Automatic Flow Control bit
1 = Automatic Flow Control is enabled
0 = Automatic Flow Control is disabled
Setting this bit will enable the automatic Flow Control. If set, the full and empty watermarks are used to
automatically enable and disable the Flow Control. When the number of received buffers BUFCNT<7:0> bits
(ETHSTAT<23:16>) rises to the full watermark, Flow Control is automatically enabled. When the BUFCNT
falls to the empty watermark, Flow Control is automatically disabled.
This bit is only used for Flow Control operations, and affects both TX and RX operations.
bit 6-5 Unimplemented: Read as ‘0’
Note 1: It is not recommended to clear the RXEN bit, and then make changes to any RX related field/register. The
Ethernet Controller must be reinitialized (ON cleared to ‘0’), and then the RX changes applied.
PIC32 Family Reference Manual
DS60001155D-page 35-10 © 2009-2017 Microchip Technology Inc.
Register 35-2: ETHCON2: Ethernet Controller Control 2 Register
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
15:8
U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0
— — — — — RXBUFSZ<6:4>
7:0
R/W-0 R/W-0 R/W-0 R/W-0 U-0 U-0 U-0 U-0
RXBUFSZ<3:0> — — — —
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-11 Read as ‘Unimplemented: 0’
bit 10-4 RXBUFSZ<6:0>: RX Data Buffer Size for all RX Descriptors (in 16-byte increments) bits
0x7F = RX data Buffer size for descriptors is 2032 bytes
•
•
•
0x60 = RX data Buffer size for descriptors is 1536 bytes
•
•
•
0x03 = RX data Buffer size for descriptors is 48 bytes
0x02 = RX data Buffer size for descriptors is 32 bytes
0x01 = RX data Buffer size for descriptors is 16 bytes
0x00 = Reserved
bit 3-0 Read as ‘Unimplemented: 0’
Note 1: This register is only used for RX operations.
2: The bits in this register may be changed only when the RXEN bit (ETHCON1<8>) = 0.

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Marka: Microchip
Kategoria: nieskategoryzowany
Model: PIC32MX675F512H

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