Instrukcja obsługi Microchip PIC24FJ256GA106

Microchip Niesklasyfikowane PIC24FJ256GA106

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10-Bit A/D

Converter

Section 17. 10-Bit A/D Converter

HIGHLIGHTS

This section of the manual contains the following major topics:

17.1 Introduction ................................................................................................................. 17-2

17.2 A/D Terminology and Conversion Sequence .............................................................. 17-4

17.3 Registers..................................................................................................................... 17-6

17.4 A/D Module Configuration ......................................................................................... 17-13

17.5 Initialization ............................................................................................................... 17-16

17.6 Controlling the Sampling Process ............................................................................. 17-17

17.7 Controlling the Conversion Process.......................................................................... 17-17

17.8 A/D Results Buffer..................................................................................................... 17-23

17.9 Conversion Sequence Examples.............................................................................. 17-25

17.10 A/D Sampling Requirements..................................................................................... 17-33

17.11 Transfer Function ...................................................................................................... 17-34

17.12 A/D Accuracy/Error ................................................................................................... 17-35

17.13 Operation During Sleep and Idle Modes................................................................... 17-35

17.14 Effects of a Reset...................................................................................................... 17-36

17.15 Register Maps........................................................................................................... 17-37

17.16 Electrical Specifications............................................................................................. 17-38

17.17 Design Tips ............................................................................................................... 17-39

17.18 Related Application Notes......................................................................................... 17-40

17.19 Revision History ........................................................................................................ 17-41

PIC24F Family Reference Manual

17.1 INTRODUCTION

The PIC24F 10-bit A/D Converter has the following key features:

• Successive Approximation Register (SAR) Conversion

• Conversion Speeds of up to 500 ksps

• Up to 16 External Analog Input Channels

• Multiple Internal Reference Input Channels (select devices only)

• External Voltage Reference Input Pins

• Unipolar Differential Sample-and-Hold (S/H) Amplifier

• Automatic Channel Scan mode

• Selectable Conversion Trigger Source

• 16-Word Conversion Result Buffer

• Selectable Buffer Fill modes

• Four Options for Results Alignment

• Operation during CPU Sleep and Idle modes

The 10-bit A/D Converter module accepts a single analog signal at any one instant and converts

it to a corresponding 10-bit digital value. It accomodates up to 16 analog inputs and separate ref-

erence inputs; the actual number available on a particular device depends on the package size.

The heart of the module is a Successive Approximation Register (SAR) type of A/D Converter.

Hardware features surrounding the SAR provide flexible configuration and hardware support for

automatic operation, and minimize software overhead, especially in high-speed operation. The

three major sections surrounding the ADC are analog input selection, a memory mapped output

buffer, and timing and control functions.

An internal Sample-and-Hold (S/H) amplifier acquires a sample of an input signal, then holds that

value constant during the conversion process. A combination of input multiplexers selects the

signal to be converted from multiple analog input pins. The whole multiplexer path includes pro-

vision for differential analog input, although the number of negative input pins is limited, and the

signal difference must remain positive (i.e., unipolar). The sampled voltage is held and converted

to a digital value, which strictly speaking, represents the ratio of that input voltage to a reference

voltage. Configuration choices allow connection of an external reference or use of the device

power and ground (AVDD and AVSS). Reference and input signal pins are assigned differently

depending on the particular device.

An array of timing and control selections allow the user to create flexible scanning sequences.

Conversions can be started individually by program control, continuously free running, or triggered

by selected hardware events. A single channel may be repeatedly converted; alternate conver-

sions may be performed on two channels, or any or all of the channels may be sequentially

scanned and converted according to a user-defined bit map. The resulting conversion output is a

10-bit digital number which can be signed or unsigned, left or right justified.

Conversions are automatically stored in a dedicated 16-word buffer, allowing for multiple succes-

sive readings to be taken before software service is needed. Successive conversions are placed

into sequential buffer locations. Alternatively, the buffer can be split into two 8-word sections for

simultaneous conversion and read operations. The module sets its interrupt flag after a selectable

number of conversions, from one to sixteen, when the whole buffer can be read. After the interrupt,

the sequence restarts at the beginning of the buffer. When the interrupt flag is set according to the

earlier selection, scan selections and the Output Buffer Pointer return to their starting positions.

A simplified block diagram for the module is shown in Figure 17-1.

Section 17. 10-Bit A/D Converter

10-Bit A/D

Converter

Figure 17-1: 10-Bit A/D Converter Block Diagram

Comparator

10-Bit SAR Conversion Logic

V +REF

DAC

AN12

AN13

AN14

AN15

AN8

AN9

AN10

AN11

AN4

AN5

AN6

AN7

AN0

AN1

AN2

AN3

V -REF

Sample Control

S/H

AVSS

AVDD

ADC1BUF0:

ADC1BUFF

AD1CON1

AD1CON2

AD1CON3

AD1CHS

AD1PCFG(L)

AD1PCFGH (2)

Control Logic

Data Formatting

Input MUX Control

Conversion Control

Pin Config. Control

Internal Data Bus

V +V - RR

MUX AMUX B

VINH

VINL

VINH

VINL

VR+

VR-

VR Select

VBG(1)

VBG/2(1)

AD1CSSL

AD1CSSH(2)

Note 1: Internal analog channels are implemented in select devices only. Different device families implement different

combinations of channels. Refer to the specific device data sheet for details.

2: Implemented in select devices only.

CTMU(1)

VDDCORE(1)

AVSS(1)

AVDD(1)

Specyfikacje produktu

Marka:	Microchip
Kategoria:	Niesklasyfikowane
Model:	PIC24FJ256GA106

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